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november 2010 doc id 1641 rev 2 1/22 1 vnb49n04 - VNV49N04 omnifet: fully autoprotected power mosfet features linear current limitation thermal shutdown short circuit protection integrated clamp low current drawn from input pin diagnostic feedback through input pin esd protection direct access to the gate of the power mosfet (analog driving) compatible with standard powe r mosfe t description the vnb49n04, VNV49N04 are monolithic devices designed in stmicroelectronics? vipower? m0 technology, intended for replacement of standard power mosfets from dc up to 50 khz applications . built-in thermal shutdown, linear current limitatio n and overvoltage clamp protect the chip in hars h environments . fault feedback can be detected by monitoring th e voltage at the input pin . type v clamp r ds(on) i lim vnb49n04 42 v 20 m 49 a VNV49N04 table 1. device summary package order code tube tape and reel powerso-10 VNV49N04 VNV49N0413tr to-263 (d2pak) vnb49n04 vnb49n0413tr 1 3 1 10 to-263(d2pak) powerso-10 www.st.com
contents vnb49n04 - VNV49N04 2/22 doc id 1641 rev 2 contents 1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.4 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.5 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3 protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.1 ecopack ? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.2 to-263 (d2pak) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.3 powerso-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
vnb49n04 - VNV49N04 list of tables doc id 1641 rev 2 3/22 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 4. off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 5. on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 6. dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 7. switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 8. source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 9. protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 10. to-263 (d2pak) me chanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 11. powerso-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 12. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
list of figures vnb49n04 - VNV49N04 4/22 doc id 1641 rev 2 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. connection diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 3. thermal impedance for d2pak / po werso-10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 4. derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 5. output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 6. transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 7. static drain-source on resistance vs input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 8. static drain-source on resistance (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 9. static drain-source on resistance (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 10. input charge vs input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 11. capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 12. normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 13. normalized on resistance vs temperature (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 14. normalized on resistance vs temperature (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 15. turn-on current slope (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 16. turn-on current slope (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 17. turn-off drain-source voltage slope (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1 figure 18. turn-off drain-source voltage slope (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1 figure 19. switching time resistive load vs r g (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 20. switching time resistive load vs r g (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 21. switching time resistive load vs v in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 22. current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 23. step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 24. source drain diode forward characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 figure 25. unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 26. unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 27. switching time test circuits for resistive load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 28. input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 29. test circuit for inductive load switching and diode recovery times . . . . . . . . . . . . . . . . . . . 15 figure 30. waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 31. to-263 (d2pak) package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 32. powerso-10 package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 0
vnb49n04 - VNV49N04 block diagram doc id 1641 rev 2 5/22 1 block diagram figure 1. block diagram figure 2. connection diagram (top view) powerso-10 d2pak
electrical specifications vnb49n04 - VNV49N04 6/22 doc id 1641 rev 2 2 electrical specifications 2.1 absolute maximum rating stressing the device above the rating listed in the ?absolute maximum ratings? table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implie d. exposure to the conditions in table below for extended periods may affect device reliability. refer al so to the stmicroelectronics sure program and other relevant quality document. 2.2 thermal data table 2. absolute maximum rating symbol parameter value unit v ds drain-source voltage (v in = 0 v) internally clamped v v in input voltage 18 v i d drain current internally limited a i r reverse dc output current -50 a v esd electrostatic discharge (r = 1.5 k , c = 100 pf) 2000 v p tot total dissipation at t c =25c 125 w t j operating junction temperature internally limited c t c case operating temperature internally limited c t stg storage temperature -55 to 150 c table 3. thermal data symbol parameter value unit powerso-10 d2pak r thj-case thermal resistance junction-case (max) 1 1 c/w r thj-amb thermal resistance junction-ambient (max) 50 62.5 c/w
vnb49n04 - VNV49N04 electrical specifications doc id 1641 rev 2 7/22 2.3 electrical characteristics -40 c < t j < 125 c, unless otherwise specified table 4. off symbol parameter test co nditions min typ max unit v clamp drain-source clamp voltage i d =200ma; v in = 0 34 42 50 v v clth drain-source clamp threshold voltage i d =2ma; v in =0 33 v v incl input-source reverse clamp voltage i in = -1 ma -1.2 -0.1 v i dss zero input voltage drain current (v in =0v) v ds =13v; v in =0v 70 a v ds =25v; v in = 0 v 220 a i iss supply current from input pin v ds =0v; v in = 10 v 250 550 a table 5. on (1) symbol parameter test co nditions min typ max unit v in(th) input threshold voltage v ds =v in ; i d + i in = 1 ma 0.8 ? 3 v r ds(on) static drain-source on resistance v in =10v; i d =25a ? 0.04 v in =5v; i d =25a ? 0.05 1. pulsed: pulse duration = 300s, duty cycle 1.5% table 6. dynamic symbol parameter test conditions min typ max unit g fs (1) forward transconductance v ds =13v; i d =25a; t c =25c 25 30 s c oss output capacitance v ds =13v; f=1mhz; v in =0v; t c =25c 1100 1500 pf 1. pulsed: pulse duration = 300s, duty cycle 1.5% table 7. switching (1) symbol parameter test conditions min typ max unit t d(on) turn-on delay time v ds =15v; i d =25a; v gen =10v; r gen =10 ; (see figure 27 ) ? 200 600 ns t r rise time ? 1300 3600 ns t d(off) turn-off delay time ? 800 2400 ns t f fall time ? 300 900 ns
electrical specifications vnb49n04 - VNV49N04 8/22 doc id 1641 rev 2 t d(on) turn-on delay time v ds =15v; i d =25a; v gen =10v; r gen = 1000 (see figure 27 ) ?1.33.8s tr rise time ? 3.8 10.4 s t d(off) turn-off delay time ? 12 24 s t f fall time ? 6.1 17 s (di/dt) on turn-on current slope v ds =15v; i d =25a; v in =10v; r gen =10 ?25 a/s q i total input charge v ds =15v; i d =25a; v in = 10 v ? 100 nc 1. parameters guaranteed by design/characterization table 7. switching (1) (continued) symbol parameter test conditions min typ max unit table 8. source drain diode symbol parameter test co nditions min typ max unit v sd (1) forward on voltage i sd =25a; v in =0v ? 1.8 v t rr (2) reverse recovery time i sd = 25 a; di/dt = 100 a/s; v ds =30v; t j =25c; (see figure 29 ) ?250 ns q rr (2) reverse recovery charge ? 910 nc i rrm (2) reverse recovery current ? 7.5 a 1. pulsed: pulse duration = 300s, duty cycle 1.5% 2. parameters guaranteed by design/characterization. table 9. protections symbol parameter test conditions min typ max unit ilim drain current limit v in =10v; v ds = 13 v 28 49 70 a v in =5v; v ds = 13 v 28 49 70 a t dlim (1) step response current limit v in = 10 v 35 50 s v in = 5 v 90 150 s t jsh (1) overtemperature shutdown 150 c t jrs (1) overtemperature reset 135 c i gf (1) fault sink current v in =10v; v ds =13v 50 ma v in =5v; v ds =13v 20 ma e as (1) single pulse avalanche energy starting t j =25c; v ds =20v; v in =10v; r gen =1k ; l=6mh 4 j 1. parameters guaranteed by design/characterization.
vnb49n04 - VNV49N04 electrical specifications doc id 1641 rev 2 9/22 2.4 electrical char acteristics curves figure 3. thermal impedance for d2pak / powerso-10 figure 4. derating curve figure 5. output characteristics figure 6. transconductance figure 7. static drain-source on resistance vs input voltage figure 8. static drain-source on resistance (part 1)
electrical specifications vnb49n04 - VNV49N04 10/22 doc id 1641 rev 2 figure 9. static drain-source on resistance (part 2) figure 10. input charge vs input voltage figure 11. capacitance variations figure 12. normalized input threshold voltage vs temperature figure 13. normalized on resistance vs temperature (part 1) figure 14. normalized on resistance vs temperature (part 2) 0 5 10 15 20 25 30 35 40 5 10152025 r ds(on ) (mohm) i d (a) v in = 5v v in = 10v
vnb49n04 - VNV49N04 electrical specifications doc id 1641 rev 2 11/22 figure 15. turn-on current slope (part 1) figure 16. turn-on current slope (part 2) figure 17. turn-off drain-source voltage slope (part 1) figure 18. turn-off drain-source voltage slope (part 2) figure 19. switching time resistive load vs r g (part 1) figure 20. switching time resistive load vs r g (part 2)
electrical specifications vnb49n04 - VNV49N04 12/22 doc id 1641 rev 2 figure 21. switching time resistive load vs v in figure 22. current limit vs junction temperature figure 23. step response current limit figure 24. source drain diode forward characteristics
vnb49n04 - VNV49N04 electrical specifications doc id 1641 rev 2 13/22 2.5 waveforms figure 25. unclamped inductive load test circuits figure 26. unclamped inductive waveforms
electrical specifications vnb49n04 - VNV49N04 14/22 doc id 1641 rev 2 figure 27. switching time test circuits for resistive load figure 28. input charge test circuit
vnb49n04 - VNV49N04 electrical specifications doc id 1641 rev 2 15/22 figure 29. test circuit for inductive load switching and diode recovery times figure 30. waveforms
protection features vnb49n04 - VNV49N04 16/22 doc id 1641 rev 2 3 protection features during normal operation, the input pin is elec trically connected to the gate of the internal power mosfet. the device then behaves like a standard power mosfet and can be used as a switch from dc up to 50 khz. the only difference from the user?s standpoint is that a small dc current (iiss) flows into the input pin in order to supply the internal circuitry. the device integrates: overvoltage clamp protection: internally set at 42v, along with the rugged avalanche characteristics of the power mosfet stage give this device unrivalled ruggedness and energy handling capability. this feature is mainly import ant when driving inductive loads. linear current limiter circuit: limits the drain current id to ilim whatever the input pin voltage. when the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. both case and j unction temperat ures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold tjsh. overtemperature and short circuit protection: these are based on sensing the chip temperature and are not dependent on the input voltage. the location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. overtemperature cutout occurs at minimum 150 c. the device is automatically restarted when the chip temperature falls below 135 c. status feedback: in the case of an overtemperature fault condition, a status feedback is provided through the input pin. the internal protection circuit disconnects the input from the gate and connects it instead to ground via an equivalent resistance of 100 . the failure can be detected by monitoring the voltage at the input pin, which will be close to ground potential. additional features of this device are esd protection according to the human body model and the ability to be driven from a ttl logic circuit (with a small increase in r ds(on) ).
vnb49n04 - VNV49N04 package and packing information doc id 1641 rev 2 17/22 4 package and packing information 4.1 ecopack ? in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 4.2 to-263 (d2pak) mechanical data table 10. to-263 (d2pak) mechanical data dim. mm. inch min. typ max. min. typ. max. a 4.30 ? 4.60 0.169 ? 0.181 a1 2.49 ? 2.69 0.098 ? 0.106 b 0.70 ? 0.93 0.027 ? 0.036 b2 1.25 ? 1.4 0.049 ? 0.055 c 0.45 ? 0.6 0.017 ? 0.023 c2 1.21 ? 1.36 0.047 ? 0.053 d 8.95 ? 9.35 0.352 ? 0.368 e 10 ? 10.28 0.393 ? 0.404 g 4.88 ? 5.28 0.192 ? 0.208 l 15 ? 15.85 0.590 ? 0.625 l2 1.27 ? 1.4 0.050 ? 0.055 l3 1.4 ? 1.75 0.055 ? 0.068
package and packing information vnb49n04 - VNV49N04 18/22 doc id 1641 rev 2 figure 31. to-263 (d2pak) package dimension l2 l3 l b2 b g e a c2 d c a1 detail "a" detail "a" a2
vnb49n04 - VNV49N04 package and packing information doc id 1641 rev 2 19/22 4.3 powerso-10 mechanical data table 11. powerso-10 mechanical data dim. mm. inch min. typ max. min. typ. max. a 3.35 3.65 0.132 0.144 a1 0.00 0.10 0.000 0.004 b 0.40 0.60 0.016 0.024 c 0.35 0.55 0.013 0.022 d 9.40 9.60 0.370 0.378 d1 7.40 7.60 0.291 0.300 e 9.30 9.50 0.366 0.374 e1 7.20 7.40 0.283 0.291 e2 7.20 7.60 0.283 300 e3 6.10 6.35 0.240 0.250 e4 5.90 6.10 0.232 0.240 e 1.27 0.050 f 1.25 1.35 0.049 0.053 h 13.80 14.40 0.543 0.567 h 0.50 0.002 q 1.70 0.067 0o 8o
package and packing information vnb49n04 - VNV49N04 20/22 doc id 1641 rev 2 figure 32. powerso-10 package dimension detail "a" plane seating l a1 f a1 h a d d1 = = = = e4 0.10 a e c a b b detail "a" seating plane e2 10 1 eb he 0.25
vnb49n04 - vnv49n 04 revision history doc id 1641 rev 2 21/22 5 revision history table 12. document revision history date revision change 01-oct-1999 1 in itial release. 25-nov-2010 2 changed document template. removed isowatt220 package. updated figure 9: static drain-source on resistance (part 2)
vnb49n04 - VNV49N04 22/22 doc id 1641 rev 2 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in military , air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2010 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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